Hello dear students! Welcome back to our COA lesson series. Today we are going to study Chapter 4 — Register Transfer and Microoperations. This chapter is very important because it tells us how data actually moves and changes inside a computer. Every time your computer adds two numbers, shifts some bits, or copies data from one place to another, microoperations are happening behind the scenes. Let me guide you through each concept step by step. Are you ready? Great, let us start!
1. Register Transfer Language (RTL)
1.1 What is a Digital System Made Of?
Before we talk about register transfer, I want you to understand the big picture. A digital system is not just one big block. It is built from many modules. Each module is constructed from digital components such as registers, decoders, arithmetic elements, and control logic. These modules are connected to each other through common data paths and control paths. Together, they form a complete digital computer system.
Now, here is the key question: how do we describe what happens inside this system? We cannot draw a full circuit diagram every time we want to explain a simple operation. We need a short, clear notation. That is exactly what Register Transfer Language gives us.
1.2 What is a Microoperation?
The operations that are performed on data stored in registers are called microoperations. The word “micro” here means the operation is very small and basic. It is so basic that it can be completed in one single clock pulse.
Examples of microoperations include:
- Shift — moving bits left or right within a register
- Count — increasing or decreasing the value in a register
- Clear — setting all bits in a register to zero
- Load — copying new data into a register
1.3 Defining the Internal Hardware Organization
To define how a digital computer works internally, we need to specify three things:
- The set of registers the computer contains and what each register does
- The sequence of microoperations performed on the binary information stored in those registers
- The control signals that initiate and direct each microoperation
Think of it like a kitchen. The registers are the ingredients and containers. The microoperations are the cooking steps (chop, stir, heat). The control signals are the chef’s instructions that tell when each step happens.
1.4 What is Register Transfer Language?
Instead of writing long sentences to describe microoperations, we use symbols. This symbolic notation is called Register Transfer Language (RTL). It is not a programming language like C or Java. It is a notation system — a way to write down what happens to registers in a clear and short form.
In RTL, a register transfer is written like this:
This means: the content of register R1 is copied into register R2. The arrow points in the direction of data flow. After this operation, R2 has the same value as R1. But notice something important — R1 does not change. The data is copied, not moved. R1 keeps its original value.
Sometimes a control function is written before the colon. For example:
This means: If control signal P is 1 (active), then copy R1 into R2. If P is 0, nothing happens. The control function acts like a condition that must be true for the transfer to occur.
• Arrow (←) means data transfer (copy from source to destination)
• Comma (,) means two or more microoperations happen at the same time
Example: \( R2 \leftarrow R1, \; R3 \leftarrow R4 \) — both transfers happen simultaneously
• Colon (:) separates the control condition from the microoperation
• The source register never changes during a transfer
• A microoperation = one clock pulse = one basic operation
Practice Questions — Register Transfer Language
Q1 (MCQ): What does the notation \( R3 \leftarrow R1 + R2 \) represent?
(a) Copy R1 to R3, then add R2 (b) Add contents of R1 and R2, store result in R3 (c) Add R1, R2, and R3 together (d) Store R1 into R2 and R3
Q2 (MCQ): Which of the following is NOT a microoperation?
(a) Clear a register (b) Multiply two 8-bit numbers (c) Increment a register (d) Shift a register left by 1 bit
Q3 (Fill in the Blank): The symbolic notation used to specify the sequence of microoperations in a digital system is called ________.
Answer
Q1 Answer: (b) Add contents of R1 and R2, store result in R3 — The arrow means “store the result into.” The right side \( R1 + R2 \) is the operation, and R3 on the left is the destination. R1 and R2 are not changed by this operation. Only R3 gets a new value.
Q2 Answer: (b) Multiply two 8-bit numbers — Multiplication cannot be done in one clock pulse. It requires a sequence of add-and-shift microoperations. Since a microoperation must complete in one clock pulse, multiplication does not qualify as a single microoperation. Clear, increment, and shift by 1 bit are all single-pulse operations.
Q3 Answer: Register Transfer Language (RTL) — RTL is the symbolic notation system used to describe microoperations and register transfers in digital systems. It uses symbols instead of words to keep descriptions short and precise.
2. Bus and Memory Transfers
2.1 Why Do We Need a Bus?
Imagine you have 8 registers in a computer, and each register is 4 bits wide. If you want to connect every register directly to every other register so that any register can send data to any other register, you would need a huge number of wires. For 8 registers, that would be 8 × 7 = 56 separate connections. That is too many wires, too complex, and too expensive.
The solution is simple and clever: use a common bus. A bus is a shared set of wires that all registers can connect to. Instead of direct connections between every pair, every register connects to the same bus. At any moment, only one register places its data on the bus, and any other register can read that data.
Think of a bus like a shared highway. Many cities (registers) are connected to the same road. At any time, only one truck (data) travels on the road. But every city can send or receive goods using that same road.
2.2 How is a Bus Constructed Using Multiplexers?
A bus structure consists of a set of common lines — one line for each bit of a register. If registers are 4 bits wide, the bus has 4 lines. If registers are 16 bits wide, the bus has 16 lines.
Multiplexers (MUX) are used to build this common bus. Each multiplexer selects which register’s bit is placed on the corresponding bus line. The select lines of the multiplexers determine which register is the source at any given time.
2.3 The Key Formula for Bus Construction
Here is a very important formula that you must memorize for your exam:
If you have k registers of n bits each, you need:
• n multiplexers (one for each bit position)
• Each multiplexer is of size k × 1 (k data inputs, 1 output)
• The bus has n lines (one per bit)
Example: 8 registers of 4 bits each → 4 multiplexers, each 8×1 → 4-line bus
Example: 4 registers of 16 bits each → 16 multiplexers, each 4×1 → 16-line bus
Let me walk you through this diagram carefully. We have 4 registers, each with 4 bits. For bit position 3 (the leftmost bit), we take bit 3 from R0, bit 3 from R1, bit 3 from R2, and bit 3 from R3. These four bits go into a 4-to-1 multiplexer. The output of this MUX becomes Bus Line 3. We do the same thing for bit positions 2, 1, and 0. In total, we use 4 multiplexers (one per bit), and each MUX is 4×1 (4 inputs, 1 output).
All four multiplexers share the same select lines (S1, S0). This is important because all bits of the selected register must be placed on the bus at the same time. When S1S0 = 01, all four MUXes select their second input, which means all 4 bits of R1 appear on the 4 bus lines simultaneously.
2.4 Bus Transfer Notation
In RTL, a bus transfer is written as:
This means register R1 places its data on the bus. Then, to copy from the bus to another register:
Often these are combined. If we want to transfer from R1 to R2 through the bus:
The bus is implied — we do not always need to write “BUS” explicitly. But remember, in the actual hardware, the data travels through the bus.
2.5 Memory Transfer
A memory transfer is similar to a register transfer, but the destination or source is a memory location instead of a register. Memory has an address, so we must specify the address along with the transfer.
Read from memory (Memory to Register):
This means: Read the data from the memory location whose address is in register AR (Address Register), and store that data in R2. The address register AR holds the address, and the data at that address goes into R2.
Write to memory (Register to Memory):
This means: Take the data from R2 and write it into the memory location whose address is in AR.
Practice Questions — Bus and Memory Transfer
Q1 (MCQ): A system has 16 registers, each 8 bits wide. How many multiplexers are needed to construct a common bus, and what size is each multiplexer?
(a) 8 multiplexers, each 8×1 (b) 16 multiplexers, each 8×1 (c) 8 multiplexers, each 16×1 (d) 16 multiplexers, each 16×1
Q2 (MCQ): What does the notation \( M[AR] \leftarrow R1 \) mean?
(a) Copy AR into R1 (b) Copy R1 into AR (c) Write R1 data into memory at address in AR (d) Read memory data from address AR into R1
Q3 (Workout): A digital system has 4 registers (R0 through R3), each 4 bits. Draw the bus structure in words: how many MUXes, what size, how many bus lines, and how many select lines?
Answer
Q1 Answer: (c) 8 multiplexers, each 16×1 — Using the formula: n = 8 bits, so we need 8 multiplexers (one per bit). k = 16 registers, so each MUX must be 16×1 (16 inputs from the 16 registers, 1 output to the bus). The bus has 8 lines. The select lines needed = log₂(16) = 4 select lines.
Q2 Answer: (c) Write R1 data into memory at address in AR — The arrow points toward M[AR], which means data flows INTO the memory location. R1 is the source. So R1’s content is written to the memory address specified by AR. If the arrow pointed the other way (\( R1 \leftarrow M[AR] \)), it would be a read operation.
Q3 Answer: We have k=4 registers of n=4 bits each.
• Number of multiplexers = n = 4 (one for each bit position)
• Size of each MUX = k×1 = 4×1 (4 register inputs, 1 bus output)
• Number of bus lines = n = 4
• Number of select lines = log₂(k) = log₂(4) = 2 (S1, S0)
Each of the 4 MUXes receives bit 0 (or 1, 2, 3) from all 4 registers and outputs one bit to the corresponding bus line. All MUXes share the same 2 select lines.
3. Arithmetic Microoperations
3.1 The Four Categories of Microoperations
Before we dive into arithmetic, let me show you the big picture. There are four categories of microoperations that are most commonly used:
- Register Transfer — copy binary information from one register to another
- Arithmetic — perform arithmetic operations on numeric data stored in registers
- Logic — perform bit manipulation operations on non-numeric data
- Shift — perform shift operations on data stored in registers
We will now study categories 2, 3, and 4 in detail. Let us start with arithmetic.
3.2 Basic Arithmetic Microoperations
The basic arithmetic microoperations are:
- Addition: \( R3 \leftarrow R1 + R2 \)
- Subtraction: \( R3 \leftarrow R1 – R2 \)
- Increment: \( R1 \leftarrow R1 + 1 \)
- Decrement: \( R1 \leftarrow R1 – 1 \)
Worked Example — Addition: If R1 = 0101 (decimal 5) and R2 = 0011 (decimal 3), then after \( R3 \leftarrow R1 + R2 \), register R3 will contain 1000 (decimal 8).
3.3 Binary Adder Construction
A binary adder is the hardware circuit that performs addition. It generates the arithmetic sum of two binary numbers of any length. To build an n-bit binary adder, you need n full-adder circuits connected in cascade (chain).
Each full-adder takes three inputs: two data bits (one from each number) and a carry-in from the previous stage. It produces two outputs: a sum bit and a carry-out that goes to the next stage.
A full-adder adds two bits plus a carry from the previous stage.
3.4 Subtraction Using Complementation
Now, here is a very important exam topic. Subtraction is not usually done with a dedicated subtraction circuit. Instead, subtraction is implemented through complementation and addition. This is much more efficient because the same adder circuit can perform both addition and subtraction.
The subtraction \( A – B \) is performed by these steps:
- Take the 1’s complement of B — invert every bit of B
- Add 1 to get the 2’s complement — this is the same as adding 1 to the 1’s complement
- Add the result to A
In RTL notation, subtraction is written as:
Here, \( R2′ \) means the 1’s complement of R2 (all bits inverted), and the “+ 1” converts it to 2’s complement. So this single expression does: R3 = R1 + (2’s complement of R2) = R1 – R2.
Worked Example: Subtract R2 from R1 where R1 = 0110 (6) and R2 = 0011 (3).
3.5 Why Multiply and Divide Are NOT Microoperations
This is a very common exam question. Multiplication and division are NOT listed as basic arithmetic microoperations. Why? Because they cannot be completed in one clock pulse. A microoperation, by definition, must finish in one clock pulse.
Multiplication is implemented as a sequence of add-and-shift microoperations. Division is implemented as a sequence of subtract-and-shift microoperations. Each add-and-shift (or subtract-and-shift) in the sequence is a microoperation, but the entire multiplication or division process is a sequence of microoperations, not a single microoperation.
Practice Questions — Arithmetic Microoperations
Q1 (MCQ): An 8-bit binary adder requires how many full-adders?
(a) 4 (b) 8 (c) 16 (d) 7
Q2 (MCQ): The RTL statement \( R3 \leftarrow R1 + R2′ + 1 \) performs which operation?
(a) R1 + R2 + 1 (b) R1 – R2 (c) R1 + R2 – 1 (d) R2 – R1
Q3 (Workout): Perform \( R1 – R2 \) using 2’s complement method where R1 = 1010 and R2 = 0101. Show all steps clearly.
Answer
Q1 Answer: (b) 8 — An n-bit binary adder requires n full-adders. For 8 bits, we need 8 full-adders connected in cascade. The first full-adder handles the least significant bits, and the eighth handles the most significant bits.
Q2 Answer: (b) R1 – R2 — The notation \( R2′ \) means 1’s complement of R2. Adding 1 to the 1’s complement gives the 2’s complement. Adding the 2’s complement is equivalent to subtraction. So \( R1 + R2′ + 1 = R1 + (2’s \; complement \; of \; R2) = R1 – R2 \).
Q3 Answer:
R1 = 1010, R2 = 0101
Step 1: 1’s complement of R2 = 1010
Step 2: 2’s complement = 1010 + 1 = 1011
Step 3: Add to R1:
4. Logic Microoperations
4.1 What Are Logic Microoperations?
Logic microoperations perform operations on individual bits of data stored in registers. Unlike arithmetic operations that treat the register content as a single number, logic operations treat each bit separately and independently. There is no carry from one bit position to the next.
Three basic logic operations are used:
- OR, symbol: \( \vee \)
- AND, symbol: \( \wedge \)
- XOR, symbol: \( \oplus \)
4.2 XOR Operation — Worked Example
The XOR operation is symbolized by \( \oplus \). In RTL, an XOR microoperation is written as:
This means: if control signal P is active, perform XOR between each bit of R1 and the corresponding bit of R2, and store the result back in R1.
Worked Example: R1 = 1010 and R2 = 1100. Find R1 after \( R1 \leftarrow R1 \oplus R2 \).
Notice how each bit is computed independently. The result in one bit position has no effect on any other bit position. This is what makes logic operations different from arithmetic operations.
4.3 16 Different Logic Operations
With two binary variables, there are exactly 16 possible logic operations. This is because each combination of two input bits can produce either 0 or 1 as output, and with 4 possible input combinations (00, 01, 10, 11), there are \( 2^4 = 16 \) possible output patterns.
These 16 operations include: AND, OR, XOR, XNOR, NAND, NOR, transfer A, transfer B, complement A, complement B, set all to 0, set all to 1, and others. A complete listing forms a truth table with 16 rows, one for each possible operation.
4.4 Important Logic Microoperations for Practical Use
Logic microoperations are very useful for manipulating specific bits within a register. Here are the five most important operations you must know for your exam:
1. Selective-Set Operation: \( A \leftarrow A \vee B \)
This sets bits in A to 1 wherever B has 1. Bits where B is 0 remain unchanged in A. Why? Because anything ORed with 1 becomes 1, and anything ORed with 0 stays the same.
2. Selective-Complement Operation: \( A \leftarrow A \oplus B \)
This flips (complements) bits in A wherever B has 1. Bits where B is 0 stay the same. Why? Because anything XORed with 1 gets flipped, and anything XORed with 0 stays the same.
3. Selective-Clear Operation: \( A \leftarrow A \wedge B’ \)
This clears bits in A to 0 wherever B has 1. Bits where B is 0 remain unchanged. The \( B’ \) is the complement of B. So we are ANDing A with the inverse of B.
4. Mask Operation: \( A \leftarrow A \wedge B \)
This is used to extract or isolate specific bits. Bits where B has 0 become 0 in A (masked out). Bits where B has 1 pass through unchanged. Register B acts as a “mask.”
5. Clear Operation: \( A \leftarrow A \oplus B \) (when B = A)
If A and B are the same register, XORing a value with itself always produces 0 (because \( x \oplus x = 0 \) for any bit x). This clears the entire register to zero.
• Selective-Set (OR): Sets bits where B=1, keeps rest → \( A \leftarrow A \vee B \)
• Selective-Complement (XOR): Flips bits where B=1, keeps rest → \( A \leftarrow A \oplus B \)
• Selective-Clear: Clears bits where B=1, keeps rest → \( A \leftarrow A \wedge B’ \)
• Mask (AND): Passes bits where B=1, clears rest → \( A \leftarrow A \wedge B \)
• Clear: XOR with self → all bits become 0
• Logic operations work on each bit independently (no carries)
Practice Questions — Logic Microoperations
Q1 (MCQ): If A = 1100 and B = 1010, what is the result of the selective-set operation \( A \leftarrow A \vee B \)?
(a) 1100 (b) 1010 (c) 1110 (d) 0110
Q2 (MCQ): Which logic microoperation is used to clear specific bits of a register while leaving other bits unchanged?
(a) Selective-set (b) Selective-complement (c) Selective-clear (d) Mask operation
Q3 (Workout): A = 1111 and B = 0101. Perform these operations one after another on the same A: (a) Selective-clear, then (b) Selective-set with the same B. Show A after each step.
Answer
Q1 Answer: (c) 1110 — Selective-set uses OR. 1100 OR 1010 = 1110. Wherever B has a 1, the corresponding bit in A becomes 1. Bit positions: 1∨1=1, 1∨0=1, 0∨1=1, 0∨0=0. Result: 1110.
Q2 Answer: (c) Selective-clear — Selective-clear (\( A \leftarrow A \wedge B’ \)) clears (sets to 0) the bits where B has 1, while keeping all other bits unchanged. The key word “clear specific bits” points directly to selective-clear. Mask operation also clears bits, but it clears where B=0 (the opposite). The question says “clear specific bits” which means we choose which bits to clear, and those chosen bits are indicated by 1s in B.
Q3 Answer:
Initial A = 1111, B = 0101
Step (a) — Selective-clear: \( A \leftarrow A \wedge B’ \)
B’ = 1010
A ∧ B’ = 1111 ∧ 1010 = 1010
After selective-clear: A = 1010
Step (b) — Selective-set: \( A \leftarrow A \vee B \) (A is now 1010)
A ∨ B = 1010 ∨ 0101 = 1111
After selective-set: A = 1111
Interesting result! The selective-clear undid the bits where B=1, and then the selective-set put them back. A returned to its original value 1111.
5. Shift Microoperations
5.1 What Are Shift Microoperations?
Shift microoperations move the bits of a register to the left or right. They are used for serial data transfer — moving data one bit at a time in or out of a register. They are also used together with arithmetic and logic operations for more complex tasks like multiplication and division.
There are three types of shift microoperations:
- Logical Shift
- Circular Shift (Rotate)
- Arithmetic Shift
Let me explain each one in detail.
5.2 Logical Shift
A logical shift moves all bits left or right by one position. The key property of a logical shift is that 0 is inserted at the empty end. The bit that falls off the other end is lost (or captured as serial output).
Logical Shift Left (shl): All bits move one position to the left. A 0 enters at the right end. The leftmost bit is lost.
In RTL: \( R1 \leftarrow shl \; R1 \)
Logical Shift Right (shr): All bits move one position to the right. A 0 enters at the left end. The rightmost bit is lost.
In RTL: \( R1 \leftarrow shr \; R1 \)
5.3 Circular Shift (Rotate)
A circular shift (also called rotate) is similar to a logical shift, but instead of inserting 0, the bit that falls off one end reappears at the other end. No information is lost — the bits just rotate around.
Circular Shift Left (cil): All bits move left. The leftmost bit wraps around to the rightmost position.
Circular Shift Right (cir): All bits move right. The rightmost bit wraps around to the leftmost position.
5.4 Arithmetic Shift
An arithmetic shift is designed for signed binary numbers. It treats the leftmost bit as the sign bit and handles it specially during the shift.
Arithmetic Shift Left: All bits (except the sign bit) shift left. This is equivalent to multiplying the number by 2. The sign bit stays in its position — it does not shift out. A 0 is inserted at the right end.
Arithmetic Shift Right: All bits shift right. The sign bit is copied (reproduced) into the next position. This is equivalent to dividing the number by 2.
• Logical shift: inserts 0 at empty end, bit falls off and is lost
• Circular shift: bit falls off one end, reappears at other end (no loss)
• Arithmetic shift left = multiply by 2 (sign bit stays in place)
• Arithmetic shift right = divide by 2 (sign bit is copied/reproduced)
• Symbols: shl = logical shift left, shr = logical shift right
• Symbols: cil = circular shift left, cir = circular shift right
• Shift microoperations are used for serial transfer of data
Practice Questions — Shift Microoperations
Q1 (MCQ): A 4-bit register R1 contains 1011. After the operation \( R1 \leftarrow cil \; R1 \), what does R1 contain?
(a) 0110 (b) 1101 (c) 0111 (d) 1110
Q2 (MCQ): An arithmetic shift right on a signed number is equivalent to:
(a) Multiplying by 2 (b) Dividing by 2 (c) Multiplying by 4 (d) Adding 1
Q3 (MCQ): What is the main difference between a logical shift and a circular shift?
(a) Logical shift is faster (b) Circular shift preserves the sign bit (c) Logical shift inserts 0; circular shift wraps the bit around (d) Circular shift cannot shift right
Q4 (Workout): R1 = 0110. Perform: (a) shl R1, (b) cil R1, (c) shr R1. Show the result of each operation separately, starting from the original R1 = 0110 each time.
Answer
Q1 Answer: (b) 1101 — Circular shift left (cil) moves all bits left by one position, and the leftmost bit wraps around to the rightmost position. Starting from 1011: shift left gives 011_, and the 1 that fell off wraps to the right → 0111. Wait, let me redo this carefully. Bits: [1][0][1][1]. Shift left: bit[0] goes to position[1], bit[1] goes to position[2], bit[2] goes to position[3], bit[3] wraps to position[0]. So: position 0 = old position 3 = 1, position 1 = old position 0 = 1, position 2 = old position 1 = 0, position 3 = old position 2 = 1. Result: 1101.
Q2 Answer: (b) Dividing by 2 — An arithmetic shift right divides a signed number by 2. The sign bit is preserved (copied), and all other bits shift right, effectively halving the value. Arithmetic shift left would multiply by 2.
Q3 Answer: (c) Logical shift inserts 0; circular shift wraps the bit around — The fundamental difference is what fills the empty position. Logical shift always inserts 0 and the shifted-out bit is lost. Circular shift takes the shifted-out bit and places it at the opposite end, so no bits are lost. Option (b) is wrong because preserving the sign bit is a property of arithmetic shift, not circular shift.
Q4 Answer: Starting from R1 = 0110 each time:
(a) shl R1: Shift all bits left, insert 0 at right. 0110 → 1100 (leftmost 0 is lost, 0 enters from right)
(b) cil R1: Circular shift left. 0110 → leftmost 0 wraps to right → 1100 (in this case, since the leftmost bit was 0, the result is the same as logical shift. But if the leftmost bit were 1, the results would differ!)
(c) shr R1: Shift all bits right, insert 0 at left. 0110 → 0011 (rightmost 0 is lost, 0 enters from left)
Challenge Exam Questions — Chapter 4 (Hard Level)
Dear students, these questions are harder than what you normally see. They test deep understanding. Try each one before you check the answer. Take your time!
CQ1 (MCQ) — Bus Construction
A digital system has 32 registers, each 32 bits wide. How many select lines are needed for the multiplexers that construct the common bus?
(a) 5 (b) 16 (c) 32 (d) 64
The number of select lines for a k×1 multiplexer is \( \log_2(k) \). Here k = 32 (number of registers). \( \log_2(32) = 5 \). So 5 select lines are needed. Each of the 32 multiplexers (one per bit) shares these same 5 select lines. The number of bits (32) determines how many multiplexers we need, but the number of select lines depends on how many registers are connected to each multiplexer.
CQ2 (MCQ) — Microoperation Identification
Which of the following is a valid arithmetic microoperation?
(a) \( R1 \leftarrow R1 \times R2 \) (b) \( R1 \leftarrow R1 \div R2 \) (c) \( R1 \leftarrow R1 + R2′ + 1 \) (d) \( R1 \leftarrow R1 \cdot R2′ \)
This is the subtraction operation implemented via 2’s complement addition. It is a valid single arithmetic microoperation. Options (a) and (b) are multiplication and division, which are NOT single microoperations (they require sequences). Option (d) uses a multiplication symbol (⋅) which is not a basic arithmetic microoperation.
CQ3 (MCQ) — Logic Operation Recognition
A register A = 11011010. You want to clear bits at positions 1, 3, and 5 (from right, starting at 0) without affecting other bits. Which mask B should be used with the mask operation \( A \leftarrow A \wedge B \)?
(a) 11011010 (b) 11010100 (c) 00100101 (d) 11111111
The mask operation \( A \wedge B \) passes bits where B=1 and clears bits where B=0. We want to CLEAR positions 1, 3, and 5. So B must have 0 at those positions and 1 everywhere else.
Position: 7 6 5 4 3 2 1 0
B should: 1 1 0 1 0 1 0 1 → but wait, we need 0 at positions 1, 3, 5. Let me recheck: positions to clear = 1, 3, 5. So B at those positions = 0; at all other positions = 1.
B = 1 1 0 1 0 1 0 1 = 11010101. Hmm, this is not exactly option (b). Let me reconsider — if positions are counted from right starting at 0: position 0 is rightmost, position 7 is leftmost. Positions 1, 3, 5 from right → bit indices 1, 3, 5 should be 0 in B. B = 11010101. Since none of the options perfectly match, option (b) 11010100 is the closest — it clears positions 0, 1, 3, and 5. The most accurate mask for clearing exactly positions 1, 3, 5 would be 11010101. In exam settings, always set 0 at positions you want to clear and 1 at positions you want to keep.
CQ4 (True/False) — Shift Operations
An arithmetic shift left on the number 1001 (in signed 4-bit representation) would produce 0010.
An arithmetic shift left keeps the sign bit in place and shifts the remaining bits left. For 1001, the sign bit is 1 (negative). In arithmetic shift left, the sign bit stays at position 3, and bits at positions 0, 1, 2 shift left. So: sign bit stays = 1, position 2 gets old position 1 = 0, position 1 gets old position 0 = 0, position 0 gets 0 (inserted). Result = 1000, not 0010. The answer 0010 would be the result of a logical shift left, which does not preserve the sign bit.
CQ5 (Fill in the Blank) — Multiple Blanks
(a) A bus system with k registers of n bits each requires ________ multiplexers, each of size ________.
(b) The operation \( A \leftarrow A \oplus B \) is called ________ operation.
(c) ________ shift inserts 0 at the empty end, while ________ shift wraps the displaced bit to the opposite end.
(d) A control unit that uses ROM is called a ________ control unit (from Chapter 3 connection).
(a) n, k×1 — One multiplexer per bit (n total), each accepting k inputs (one from each register).
(b) Selective-complement — XOR with B flips (complements) the bits where B has 1.
(c) Logical, circular — Logical shift inserts 0; circular shift (rotate) wraps the bit around.
(d) Microprogrammed — From Chapter 3, a control unit using ROM to store binary control information is microprogrammed.
CQ6 (Short Answer) — Subtraction Method
Explain why computers typically implement subtraction using complementation and addition instead of using a dedicated subtraction circuit. Include the RTL notation for subtraction.
Computers use complementation and addition for subtraction because it is more hardware-efficient. With this method, the same binary adder circuit can perform both addition and subtraction. You do not need a separate subtraction circuit. To subtract B from A:
1. Take the 1’s complement of B (invert all bits)
2. Add 1 to get the 2’s complement of B
3. Add the 2’s complement to A using the same adder
In RTL: \( R3 \leftarrow R1 + R2′ + 1 \)
This approach saves hardware (one adder does both jobs) and simplifies the arithmetic logic unit (ALU) design. The only extra hardware needed is an inverter for the 1’s complement and the ability to add 1 (which can be done through the carry-in of the adder).
CQ7 (Step-by-Step Calculation) — Subtraction with 2’s Complement
Using the 2’s complement method, compute \( R1 – R2 \) where R1 = 1001 and R2 = 0011. Both are 4-bit registers. Show all steps and verify the result.
R1 = 1001, R2 = 0011
Step 1: 1’s complement of R2 = 1100
Step 2: 2’s complement = 1100 + 1 = 1101
Step 3: Add to R1:
If we treat these as signed numbers: 1001 = -7 (in 4-bit 2’s complement), 0011 = +3. -7 – 3 = -10, but in 4-bit 2’s complement the range is -8 to +7, so -10 cannot be represented. This would be an overflow. The result 0110 (which is +6) is incorrect for signed interpretation due to overflow. This is a great reminder that 2’s complement subtraction can produce overflow when the true result is outside the representable range.
CQ8 (Step-by-Step Calculation) — Multiple Shifts
R1 = 1011. Perform the following sequence of operations: (a) cil R1, (b) shr R1, (c) shl R1. Show R1 after each step, using the result of the previous step as input for the next.
Initial: R1 = 1011
(a) cil R1 (circular shift left): Leftmost bit (1) wraps to right → 0111
(b) shr R1 (logical shift right, R1 is now 0111): Insert 0 at left, rightmost bit (1) lost → 0011
(c) shl R1 (logical shift left, R1 is now 0011): Insert 0 at right, leftmost bit (0) lost → 0110
Final result: R1 = 0110
CQ9 (MCQ) — Memory Transfer Notation
Which RTL statement correctly represents “read data from memory location 25 and store it in register R1”?
(a) \( R1 \leftarrow M[25] \) (b) \( M[25] \leftarrow R1 \) (c) \( R1 \leftarrow M + 25 \) (d) \( R1 \leftarrow 25 \)
\( M[25] \) means “the memory location at address 25.” The arrow points from \( M[25] \) to R1, meaning data flows from memory into R1. Option (b) would write R1 into memory (wrong direction). Option (c) adds 25 to memory content (nonsense). Option (d) just loads the number 25 into R1 (not a memory read).
CQ10 (Short Answer) — 16 Logic Operations
Explain why there are exactly 16 different logic operations possible with two binary variables. List any 4 of these operations with their truth tables.
With two binary variables, there are \( 2^2 = 4 \) possible input combinations: (0,0), (0,1), (1,0), (1,1). For each combination, the output can be either 0 or 1. Since there are 4 input combinations and each can independently produce 0 or 1, the total number of possible output patterns is \( 2^4 = 16 \). Each unique output pattern defines a different logic operation.
Four example operations:
1. AND (A ∧ B): 00→0, 01→0, 10→0, 11→1
2. OR (A ∨ B): 00→0, 01→1, 10→1, 11→1
3. XOR (A ⊕ B): 00→0, 01→1, 10→1, 11→0
4. NAND: 00→1, 01→1, 10→1, 11→0
(The remaining 12 operations include NOR, XNOR, transfer A, transfer B, complement A, complement B, identity 0, identity 1, and four more combinations.)
CQ11 (MCQ) — Register Transfer Concepts
In the statement \( P: R2 \leftarrow R1, \; R3 \leftarrow R4 \), what is the significance of the comma between the two transfers?
(a) The second transfer happens after the first (b) Both transfers happen at the same time (c) Only one transfer happens based on priority (d) The transfers are alternatives (one or the other)
In RTL, a comma between microoperations means they occur simultaneously (in parallel, during the same clock pulse). Both R2 ← R1 and R3 ← R4 happen at the same time. If you wanted them to happen one after another, you would use a semicolon (;) or write them on separate lines with different control conditions.
CQ12 (Workout) — Logic Operations Combined
A = 10110101 and B = 01101010. Perform the following in sequence, updating A each time: (a) \( A \leftarrow A \wedge B \), (b) \( A \leftarrow A \vee B \), (c) \( A \leftarrow A \oplus B \). Show A after each step.
Initial: A = 10110101, B = 01101010
(a) Mask: \( A \leftarrow A \wedge B \)
(b) Selective-set: \( A \leftarrow A \vee B \) (A is now 00100000)
(c) Selective-complement: \( A \leftarrow A \oplus B \) (A is now 01101010)
Notice: Since A became equal to B after step (b), XORing A with B in step (c) gives all zeros (because \( x \oplus x = 0 \)). The register is completely cleared!
CQ13 (True/False) — RTL Concepts
In the transfer \( R2 \leftarrow R1 \), the content of R1 is destroyed after the transfer.
A register transfer is a copy operation, not a move. The source register (R1) retains its original value. Only the destination register (R2) changes. This is a fundamental concept in RTL. Think of it like copying a file on your computer — the original file stays where it is.
CQ14 (MCQ) — Arithmetic Shift Application
A signed 8-bit number 01011000 (decimal 88) is arithmetic-shifted right by one position. What is the resulting value in decimal?
(a) 176 (b) 44 (c) 88 (d) 22
Arithmetic shift right divides by 2. 88 ÷ 2 = 44. In binary: 01011000 → arithmetic shift right → the sign bit (0) is copied → 00101100 = decimal 44. The sign bit stays 0 (positive), and the remaining bits shift right, effectively halving the value. If we had shifted left, the result would be 176 (88 × 2), but only if no overflow occurs.
CQ15 (Short Answer) — Bus vs Direct Connection
A system has 8 registers of 16 bits each. Compare the number of interconnection wires needed for direct register-to-register connections versus a common bus system. Show the calculation.
Direct connection approach: Each register must connect to every other register. For 8 registers, each register needs connections to 7 other registers. Each connection is 16 bits wide. Total wires = 8 × 7 × 16 = 896 wires.
Common bus approach: Each register connects to the bus (16 wires). Total wires from registers to bus = 8 × 16 = 128 wires. Plus the bus itself = 16 wires. Plus select lines = \( \log_2(8) = 3 \) select lines. Total ≈ 147 wires.
Comparison: Direct connection needs 896 wires; bus system needs about 147 wires. The bus reduces wiring by roughly 84%. This massive reduction is why bus systems are used in all real computers. As the number of registers grows, the advantage of the bus becomes even more dramatic.
Quick Revision Sheet — Chapter 4
Use this sheet for fast revision right before your exam. Everything important in one place!
Register Transfer Language (RTL)
| Symbol | Meaning |
|---|---|
| \( R2 \leftarrow R1 \) | Copy R1 into R2 (R1 unchanged) |
| \( R3 \leftarrow R1 + R2 \) | Add R1 and R2, store in R3 |
| \( P: R2 \leftarrow R1 \) | If P=1, copy R1 into R2 |
| Comma (,) | Simultaneous operations |
| \( M[AR] \leftarrow R1 \) | Write R1 to memory at address AR |
| \( R1 \leftarrow M[AR] \) | Read from memory at address AR into R1 |
Bus Construction Formula
- k registers of n bits → n multiplexers, each k×1
- Select lines = \( \log_2(k) \)
- Bus lines = n
Arithmetic Microoperations
| Operation | RTL | Notes |
|---|---|---|
| Addition | \( R3 \leftarrow R1 + R2 \) | Uses n-bit binary adder (n full-adders) |
| Subtraction | \( R3 \leftarrow R1 + R2′ + 1 \) | 2’s complement method |
| Increment | \( R1 \leftarrow R1 + 1 \) | Add 1 to register |
| Decrement | \( R1 \leftarrow R1 – 1 \) | Subtract 1 from register |
Multiply and Divide are NOT microoperations! (need multiple clock pulses)
Logic Microoperations
| Operation | RTL | Effect |
|---|---|---|
| OR | \( A \leftarrow A \vee B \) | Selective-set: sets bits where B=1 |
| AND | \( A \leftarrow A \wedge B \) | Mask: passes bits where B=1 |
| XOR | \( A \leftarrow A \oplus B \) | Selective-complement: flips bits where B=1 |
| Selective-Clear | \( A \leftarrow A \wedge B’ \) | Clears bits where B=1 |
| Clear | \( A \leftarrow A \oplus A \) | All bits become 0 |
16 possible logic operations with two variables (\(2^4 = 16\)). Each bit processed independently (no carries).
Shift Microoperations
| Type | Left Symbol | Right Symbol | Fills Empty End With | Bit Falls Off |
|---|---|---|---|---|
| Logical | shl | shr | 0 | Lost |
| Circular | cil | cir | Wrapped bit | Reappears at other end |
| Arithmetic | — | — | Left: 0 / Right: copy of sign bit | Lost |
- Arithmetic shift left = multiply by 2
- Arithmetic shift right = divide by 2
- Shifts are used for serial data transfer
Key Formulas at a Glance
• Microoperation = one clock pulse — anything needing more pulses is a SEQUENCE
• Source register NEVER changes in a transfer
• Comma = simultaneous, semicolon/different conditions = sequential
• Subtraction always uses 2’s complement (R2′ + 1), never a subtractor circuit
• Logic ops: no carries between bits (unlike arithmetic)
• Logical shift loses bits; circular shift preserves them
• Arithmetic shift preserves sign bit (copies it on right shift, holds it on left shift)
• Bus reduces wires dramatically — know the k×n formula
• M[AR] means “memory content at address in AR,” not AR itself